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Gate-all-around (GAA) architectures are in the running to replace FinFET transistors. They have the potential to enhance the performance of today's electronic components and make them more energy efficient. High performance computing (HPC), smartphones, and laptop computers could all potentially benefit from GAA architectures. In a world first, CEA-Leti successfully tested a demonstrator with seven levels of stacked silicon channels, far more than the usual three levels.
CEA-Leti researchers had to overcome several technical challenges to fabricate the seven-level device. They were able to improve the fabrication processes to push the architecture to its limits: The seven levels of stacked silicon channels represent more than twice as many as the current state of the art, with widths ranging from 15 nm to 85 nm.
The demonstrator was fabricated with a gate-last process that made it possible to utilize industrial CMOS processes developed for FinFET. A virtual presentation of the architecture and the performance of the transistors built was given at the VLSI 2020 conference.
CEA is a French government-funded technological research organisation in four main areas: low-carbon energies, defense and security, information technologies and health technologies. A prominent player in the European Research Area, it is involved in setting up collaborative projects with many partners around the world.